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HT84XXX Magic VoiceTM
Features
* * * * * * * * *
Operating voltage: 2.4V~5.0V Programmable tone melody generator ADPCM or m-law PCM, PCM synthesis Wide range of sampling rate for voice synthesis Minimum sampling rate step: 100Hz Voice melody mixed output Programmable 2 channels of melody mixed output Programmable 2 channels of voice mixed output 13 kinds of melody beats
* * * * * * * * * * *
5 octaves of tone level and 18 tempos 16 levels of digital volume control Two current type D/A outputs Eight programmable I/O pins Four programmable input pins Provides 36 sec to 384 sec of voice capacity Timer controller Voice fill-in function Powerful user-defined functions Power-on initial setting 28-pin SKDIP package
Applications
* *
High-end educational leisure products Alert and warning systems
*
Speech synthesizers and sound effect generators
General Description
The HT84XXX family is a series of programmable speech synthesizers and tone generators designed for user-defined voice and melody applications. It provides various sampling rates and beats, tone levels, tempos for the speech synthesizer and melody generator. The HT84XXX series has two built-in high quality, current type D/A outputs with 16 levels of volume control. The users commands enable the user to program the powerful custom function such as to build-in a tiny controller. The Magic VoiceTM provides various operational functions similar to arithmetic operation, logic operation, branch decision, random counter, and a programmable timer. The Magic VoiceTM series are suitable for versatile voice and sound effect applications. The HT84XXX Magic VoiceTM is Easy FormatTM supported.
ROM Selection Table
The HT84XXX series provides various voice capacity as shown below: Part No. ROM Voice Length HT84036 768Kb 36 sec HT84072 1536Kb 72 sec HT84144 3072Kb 144 sec HT84192 4096Kb 192 sec HT84384 8192Kb 384 sec
Note: The voice capacity is based on a sampling rate of 21Kb/s
Magic Voice is a trademark of Holtek Semiconductor Inc. TM Easy Format is a trademark of Grow With Me, Inc.
TM
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HT84XXX
Block Diagram
OSC T im e B a s e G e n e ra to r T o n e /M e lo d y G e n e ra to r C u rre n t T y p e D /A O u tp u t AUD0
PB0~PB7 PA0~PA3 VDD VSS
D ecoder & I/O C o n tr o lle r
DA &U In s tru RO
TA ser c tio n M
S peech S y n th e s iz e r
C u rre n t T y p e D /A O u tp u t
AUD1
Pin Assignment
NC NC NC NC NC VDD AUD0 AUD1 PB7 PB6 PB5 PB4 PB3 PB2 9 10 11 12 13 14 8 7 6 5 4 3 2 1 28 27 26 25 24 23 22 21 20 19 18 17 16 15 NC NC NC NC NC OSC VSS VSS PA0 PA1 PA2 PA3 PB0 PB1
H T84XXX 2 8 S K D IP
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HT84XXX
Pad Assignment
HT84036
VDD 1
(0 , 0 ) 18 OSC
AUD0 2
17 16
VSS VSS
4 5 3 AUD1 PB7
6
7
8 9
10
11
12
13
14
15
Chip size: 2735 2105 (mm)2 * The IC substrate should be connected to VSS in the PCB layout artwork.
PB6
PB5
PB4
PB3
PB2
PB1
PB0
PA3
PA2
PA1
PA0
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HT84XXX
HT84072
(0 , 0 ) VDD 1 18 OSC
AUD0
2
17 16
VSS VSS
4 3 AUD1 PB7
5
6
7
8
9
10
11
12
13
14
15
Chip size: 2735 2645 (mm)2 * The IC substrate should be connected to VSS in the PCB layout artwork.
PB6
PB5
PB4
PB3
PB2
PB1
PB0
PA3
PA2
PA1
PA0
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HT84XXX
HT84144
(0 , 0 )
VDD 1
18
OSC
AUD0
2
17 16
VSS VSS
4 3 AUD1 PB7
5
6
7
8
9
10
11
12
13
14
15
Chip size: 2735 3735 (mm)2 * The IC substrate should be connected to VSS in the PCB layout artwork.
PB6
PB5
PB4
PB3
PB2
PB1
PB0
PA3
PA2
PA1
PA0
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HT84XXX
HT84192
(0 ,0 )
VDD
1 18 OSC VSS VSS
AUD0
2
4 3 AUD1 5 PB6 PB7 6 PB5 7 PB4 8 PB3 9 PB2 10 PB1 11 PB0 12 PA3 13 14 PA2 PA1
17 16 15 PA0
Chip size: 2735 4460 (mm)2 * The IC substrate should be connected to VSS in the PCB layout artwork.
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HT84XXX
HT84384
(0 , 0 )
VDD 1
18 AUD0 2 17 16 3 AUD1 4 5 6 PB5 PB6 PB7 7 8 PB3 PB4 9 PB2 10 PB1 11 12 PB0 PA3 13 PA2 14 PA1 15 PA0
OSC1 VSS VSS
Chip size: 2740 7350 (mm)2 * The IC substrate should be connected to VSS in the PCB layout artwork.
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HT84XXX
Pad Coordinates
HT84036 Pad No. 1 2 3 4 5 6 7 8 9 HT84072 Pad No. 1 2 3 4 5 6 7 8 9 HT84144 Pad No. 1 2 3 4 5 6 7 8 9 X -1125.31 -1177.49 -939.68 -689.05 -503.45 -352.65 -167.05 -16.25 169.35 Y -700.26 -1213.79 -1699.61 -1589.24 -1589.24 -1589.24 -1589.24 -1589.24 -1589.24 Pad No. 10 11 12 13 14 15 16 17 18 X 320.15 505.75 656.55 842.15 992.95 1178.55 1167.43 1167.53 1167.53 X -1125.31 -1177.49 -939.68 -689.05 -503.45 -352.65 -167.05 -16.25 169.35 Y -155.26 -668.79 -1154.61 -1044.24 -1044.24 -1044.24 -1044.24 -1044.24 -1044.24 Pad No. 10 11 12 13 14 15 16 17 18 X 320.15 505.75 656.55 842.15 992.95 1178.55 1167.43 1167.53 1167.53 X -1125.31 -1177.49 -939.68 -689.05 -503.45 -352.65 -167.05 -16.25 169.35 Y 114.74 -398.79 -884.61 -774.24 -774.24 -774.24 -774.24 -774.24 -774.24 Pad No. 10 11 12 13 14 15 16 17 18 X 320.15 505.75 656.55 842.15 992.95 1178.55 1167.43 1167.53 1167.53 Unit: mm Y -774.24 -774.24 -774.24 -774.24 -774.24 -774.24 -517.18 -377.08 -35.96 Unit: mm Y -1044.24 -1044.24 -1044.24 -1044.24 -1044.24 -1044.24 -787.18 -647.08 -305.96 Unit: mm Y -1589.24 -1589.24 -1589.24 -1589.24 -1589.24 -1589.24 -1332.18 -1192.08 -850.96
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HT84XXX
HT84192 Pad No. 1 2 3 4 5 6 7 8 9 HT84384 Pad No. 1 2 3 4 5 6 7 8 9 X -1121.81 -1173.99 -936.18 -685.55 -499.95 -349.15 -163.55 -12.75 172.85 Y -2507.96 -3021.49 -3507.31 -3396.94 -3396.94 -3396.94 -3396.94 -3396.94 -3396.94 Pad No. 10 11 12 13 14 15 16 17 18 X 323.65 509.25 660.05 845.65 996.45 1182.05 1170.93 1171.03 1171.03 X -1125.31 -1177.49 -939.68 -689.05 -503.45 -352.65 -167.05 -16.25 169.35 Y -1062.76 -1576.29 -2062.11 -1951.74 -1951.74 -1951.74 -1951.74 -1951.74 -1951.74 Pad No. 10 11 12 13 14 15 16 17 18 X 320.15 505.75 656.55 842.15 992.95 1178.55 1167.43 1167.53 1167.53 Unit: mm Y -1951.74 -1951.74 -1951.74 -1951.74 -1951.74 -1951.74 -1694.68 -1554.58 -1213.46 Unit: mm Y -3396.94 -3396.94 -3396.94 -3396.94 -3396.94 -3396.94 -3139.88 -2999.78 -2658.66
Pin Description
Pin No. Pin Name I/O 1~5, 24~28 6 7 8 15~9 16 NC VDD AUD0 AUD1 PB1~PB7 PB0 3/4 3/4 O O I/O I/O Internal Connection 3/4 3/4 PMOS Open Drain PMOS Open Drain Pull-high or CMOS Pull-high or CMOS No connection Positive power supply Audio output for driving an external transistor Audio output for driving an external transistor Bidirectional I/O pins Can be optioned as trigger inputs or LED outputs Bidirectional I/O pins Can be optioned as CDS interface with internal Schmitt trigger input Description
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HT84XXX
Pin No. Pin Name I/O 20~17 21, 22 23 PA0~PA3 VSS OSC I 3/4 I Internal Connection Wake-up Pull-high 3/4 3/4 Description Trigger inputs Can also be configured as wake-up inputs Negative power supply, ground Built-in RC oscillator An oscillator resistor is connected between OSC and VSS
Absolute Maximum Ratings
Supply Voltage.................................-0.3V to 6V Input Voltage .................VSS-0.3V to VDD+0.3V Storage Temperature.................-50C to 125C Operating Temperature ..............-20C to 70C
Note: These are stress ratings only. Stresses exceeding the range specified under Absolute Maximum Ratings may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
Electrical Characteristics
Symbol VDD ISTB IDD IOL IO fSYS Parameter Operating Voltage Standby Current Operating Current PB0~PB7 Sink Current Max. AUD1 and AUD2 Output Current System Frequency Test Conditions VDD 3/4 3V 3V 3V 3V 3V Conditions 3/4 No load, system HALT No load, fSYS=4MHz VOL=0.3V VOH=0.6V ROSC=240kW Min. 2.4 3/4 3/4 4 -1.5 3.6
Ta=25C Typ. Max. Unit 3/4 1 5 6 -2 4.0 5.2 3 8 3/4 3/4 4.4 V mA mA mA mA MHz
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HT84XXX
Functional Description
The Magic VoiceTM series is a series of programmable speech synthesizers and melody generators. It provides various sampling rates and beats, tone levels, tempos for speech synthesizer and melody generator. For voice synthesizer, the Magic VoiceTM provides 8-bit PCM, 6-bit m-law PCM and 4-bit ADPCM synthesis. In HT84XXX series, a mixed output of two channels PCM synthesis is allowed but only one channel ADPCM synthesis is allowed. For melody generator, the Magic VoiceTM supports a tone melody and PCM melody generator and two channels mixed output for the whole series. The Magic VoiceTM series build-in 8 programmable I/O pins and 4 programmable input pins along with powerful users command. The users instructions are employed to develop new and customized functions for a wide variety of innovative applications. Speech and melody analysis The speech and melody sources of the Magic VoiceTM can be recorded and edited from the PC sound card and media tools. Holteks CAD tools first load a speech source file as .WAV or .PCM format, then transfer the speech file as PCM, LOG-PCM or ADPCM format, and finally save it to the internal mask ROM by changing a layer of the mask. The PCM format generates a higher sound quality whereas the ADPCM format brings about a longer recording capacity. The melody source can either be in the .MID or in the .MLD format. The .MID file is the standard format of the windows media tools. The .MLD file is a text format. After the .MID file is compiled, the .MLD file is automatically generated. The Magic VoiceTM can support the following compression format of the voice .WAV and .PCM file: AD4, PCM8, m-law PCM. Current type D/A output The HT84XXX series supply two high accuracy current type D/A output pins for audio output. The output volume is changeable from 0 to 15 digital levels by writing a value to the VOL11
UME_n (n=1 or 2) registers. The D/A pins are PMOS open drain structure and ouput synthesized signals for driving a speaker through an external NPN transistor when the chip is active. However, it becomes floating when the chip is in the standby state. An 8050 type transistor with hFE=150 is recommended for the output driver of the D/A output pin. Melody/Tone generator The HT84XXX family has a built-in melody/tone generator. The generator can generate 13 different kinds of melody beats, 5 octaves of tone level, 18 tempos, and 2 channels mixed output. Of these components, the melody tempo is changeable and generates sound effects by writing a control value to the TEMPO register. The chip provides the following 18 tempos, 13 beats, and 5 octaves for users programming.
* 18 tempos (Beats/Min.)
68 109 147
* 13 beats
78 114 156
82 119 179
93 125 192
100 132 227
105 139 310
1 1 1111123 43 1, 2 24, 12, 8, 6, 4, 3, 2, 3, 4, 3, 2,
* 5 octaves
C1~B1, C2~B2, C3~B3, C4~B4, C5~B5 PCM/ADPCM synthesizer The HT84XXX family contains a PCM and ADPCM synthesizer. The synthesizer offers a wide range of sampling rates from 4kHz to 24kHz for PCM synthesis and 4kHz to 16kHz for ADPCM synthesis. The sampling rate of the synthesizer can be changed by writing a control value to the sampling rate register. It also supports a small variety of 100Hz. For a higher performance sound quality, the PCM coding is required. But for a longer recording capacity, the ADPCM coding is recommended.
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HT84XXX
The capability of the voice sampling rate for various voice compression format. fOSC 4M 5M 6M 8M PCM8 12kHz 15kHz 18kHz 24kHz m-law PCM 11kHz 14kHz 16kHz 22kHz AD4 8kHz 10kHz 12kHz 16kHz sistor of 240kW. The RC type of oscillator offers the most cost-effective solution, although the frequency of the oscillation may vary with temperature and the chip itself due to process variation. ROSC HT84EVA HT84P00 IC fOSC 4M 5M 6M 8M Mask options The following options have to be defined to ensure a proper system functioning:
* Pull-high resistor: 33kW/98kW (3V) * Keydebouncetime:0ms~255ms(fOSC=4MHz)
180kW 150kW 120kW 91kW
240kW 210kW 180kW 150kW
240kW 210kW 180kW 150kW
Oscillator configuration The HT84XXX series provides an RC oscillator for the system clock. The system oscillator stops in the standby state so as to reduce power consumption. For the oscillator circuit, an external resistor is required between OSC and VSS. The oscillator frequency is typically 4MHz for an external re-
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HT84XXX
Application Circuits
Basic application
EASY 4
V
DD
PA0 VDD PA1 PA2 PA3
TR1 V TR2 TR3 TR4 OUT8 OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 8050
E A S Y 4 -1
DD
PA0 VDD PA1 PA2 PA3
TR1 TR2 TR3 TR4
8050 8050
AUD0 PB7 AUD1 PB6 PB5 PB4 PB3 OSC PB2 PB1 VSS PB0
8050
AUD0 PB7 AUD1 PB6 PB5 PB4 PB3 OSC R
OSC
OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1
PB2 PB1
R
OSC
OUT1
VSS
PB0
V
EASY 8
DD
PA0 VDD PA1 PA2 PA3
TR1 TR2 TR3 TR4
TR5 V TR6 TR7 TR8
DD
EA SY 12
PA0 VDD PA1 PA2 PA3
TR1 TR2 TR3 TR4
TR5 TR6 TR7 TR8
TR9 TR10 TR11 TR12
8050 8050
AUD0 PB7 AUD1 PB6 PB5 PB4 PB3 OSC R
OSC
8050 8050 OUT6 OUT5 OUT4 OUT3 OUT2 R OUT1
OSC
AUD0 PB7 AUD1 PB6 PB5 PB4 PB3 OSC PB2 PB1 VSS PB0 OUT5
OUT4
OUT3
PB2 PB1
OUT2
OUT1
VSS
PB0
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HT84XXX
V
DD
EA SY 16
PA0 VDD PA1 PA2 PA3
TR1 TR2 TR3 TR4
TR5 TR6 TR7 TR8
TR9 TR10 TR 11 TR12
TR13 TR14 TR15 TR 16
8050 8050
AUD0 PB7 AUD1 PB6 PB5 PB4 PB3 OSC PB2 PB1 VSS PB0 OUT4 OUT3
R
OSC
OUT2
OUT1
V
EA SY 20
DD
PA0 VDD PA1 PA2 PA3
TR1 TR2 TR3 TR4
TR5 TR6 TR7 TR8
TR9 TR10 TR 11 TR12
TR13 TR14 TR15 TR 16
TR17 TR18 TR19 TR 20
8050 8050
AUD0 PB7 AUD1 PB6 PB5 PB4 PB3 OSC PB2 PB1 VSS PB0 OUT3
R
OSC
OUT2
OUT1
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HT84XXX
EA SY 24
V
DD
PA0 VDD PA1 PA2 PA3
TR1 TR2 TR3 TR4
TR5 TR6 TR7 TR8
TR9 TR10 TR 11 TR12
TR13 TR14 TR15 TR 16
TR17 TR18 TR19 TR 20
TR21 TR22 TR23 TR 24
8050 8050
AUD0 PB7 AUD1 PB6 PB5 PB4 PB3 OSC PB2 PB1 VSS PB0
R
OSC
OUT2
OUT1
EA SY 28
V
DD
PA0 VDD PA1 PA2 PA3
TR1 TR2 TR3 TR4
TR5 TR6 TR7 TR8
TR9 TR10 TR 11 TR12
TR13 TR14 TR15 TR 16
TR17 TR18 TR19 TR 20
TR21 TR22 TR23 TR 24
TR25 TR26 TR27 TR 28
8050 8050
AUD0 PB7 AUD1 PB6 PB5 PB4 PB3 OSC PB2 PB1 VSS PB0 OUT1
R
OSC
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HT84XXX
V
DD
EA SY 32
PA0
TR1 TR2 TR3 TR4
TR5 TR6 TR7 TR8
TR9 TR10 TR11 TR12
TR13 TR14 TR15 TR16
TR17 TR18 TR19 TR20
TR21 TR22 TR23 TR24
TR25 TR26 TR27 TR28
TR29 TR30 TR31 TR32
VDD
PA1 PA2
8050
8050
AUD0 AUD1
PA3 PB7 PB6 PB5 PB4
OSC
PB3 PB2 PB1 PB0
R
OSC
VSS
V
EA SY 64
DD
PA3
VDD
PA2 PA1
8050
8050
AUD0 AUD1
PA0
TR1 PB6 PB5 TR9 TR17 TR25 TR33 TR41 TR49 TR57
TR2 TR10 TR18 TR26 TR34 TR42 TR50 TR58
TR3 TR11 TR19 TR27 TR35 TR43 TR51 TR59
TR4 TR12 TR20 TR28 TR36 TR44 TR52 TR60
TR5 TR13 TR21 TR29 TR37 TR45 TR53 TR61
TR6 TR14 TR22 TR30 TR38 TR46 TR54 TR62
TR7 TR15 TR23 TR31 TR39 TR47 TR55 TR63
TR8 TR16 TR24 TR32 TR40 TR48 TR56 TR64
OSC
PB4 PB3
R
OSC
VSS
PB2 PB1 PB0 PB7
Note: In Easy 64 mode, only falling edge trigger can be used in input state In Easy 64 mode, the path command TRn?L:pathname and TRn?H:pathname are invalid
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Push-pull amplifilter application
V
DD
VDD 8050 47mF AUD0
PA0 PA1 PA2 PA3 PB7
IN P U T 1 IN P U T 2 IN P U T 3 IN P U T 4 OUT8 OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1
8550 470W V
DD
PB6 PB5 PB4 PB3
8050 47mF
AUD1
PB2 PB1 PB0
8550 470W
OSC R
OSC
VSS
OP amplifilter application
V
DD
VDD 0 .1 m F To Power Amp 10kW 560W AUD0
PA0 PA1 PA2 PA3 PB7 PB6
IN P U T 1 IN P U T 2 IN P U T 3 IN P U T 4 OUT8 OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1
0 .1 m F AUD1 To Power Amp 10kW 560W
PB5 PB4 PB3 PB2 PB1 PB0
OSC R
OSC
VSS
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HT84XXX
Application Notes
Easy FormatTM The syntax of the Easy FormatTM consists of four major parts. They are format and audio file declaration part, input states declaration part, output states declaration part and path command part. The architecture of the Easy FormatTM program is shown as follows: EASY n .... Stereo/Mono INPUT STATES .... OUTPUT STATES .... PATHS .... Note: Easy FormatTM is a trademark of Grow With Me, Inc. Format and voice/melody file declaration In this area the format and audio file declaration are used to define the number of input and output as well as declare the audio format. Syntax: EASY n The EASY n command is used to define the maximum number of trigger input in the application circuit. The alphanumeric n represents the number of trigger input where n has the choice from 4 to 64 with a scale 4. However, the determination of trigger input reflects the number of output. The relation of the number of I/O is shown in the following table. EASY n EASY 4 EASY 8 EASY 12 EASY 16 EASY 20 EASY 24 EASY 28 EASY 32 EASY 64 TRn TR1, TR2, TR3, TR4 TR1, TR2, ...., TR8 TR1, TR2, ...., TR12 TR1, TR2, ...., TR16 TR1, TR2, ...., TR20 TR1, TR2, ...., TR24 TR1, TR2, ...., TR28 TR1, TR2, ...., TR32 TR1, TR2, ...., TR64 OUTn OUT1, OUT2, ...., OUT7 OUT1, OUT2, ...., OUT6 OUT1, OUT2, ...., OUT5 OUT1, OUT2, ...., OUT4 OUT1, OUT2, OUT3 OUT1, OUT2 OUT1 ; Path command part ; Output states declaration part ; Two AUD output or single AUD output ; Input states declaration part ; Comment ; Format and audio file declaration part
* refer to the application circuit
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Syntax: voice_file/compression_method melody_file tone_file The source audio files must be included in your Easy program. The audio files include the voice files with the extended name .PCM or .WAV, the melody files with .MID or .MLD format and the tone files with Holteks .HT8 format. The compression methods of voice files have three options such as m-law PCM, PCM8 and AD4. Example: voice1.wav/pcm8 voice2.pcm/ad4 melody1.mid melody2.mld tone1.ht8 Stereo/Mono: The audio output selection. If the audio output is declared as Stereo, the channel 1 voice will output via AUD1 and the channel 2 voice will output via AUD2. If the audio output is declared as Mono, the channel 1 and channel 2 voices will mixedly output via AUD1 and AUD2 is invalid. The default declaration is Mono. The audio file compressed by AD4 cannot output through channel 2. If the melody file outputs through channel 2, the melody file cannot include any channel 1 instructions. Input states declaration Syntax: INPUT STATES ; statename: TRn [rising_edge_path][/falling_edge_path] .... .... ; #0 voice files declaration ; #1 ; #2 melody files declaration ; #3 ; #4 tone files declaration
The bracket [ ] is denoted as optional existence. If the path is assigned as X, the input trigger signal is ignored. Unassigned trigger paths will automatically be assigned as X. When TRn detects a rising edge or a falling edge signal, the path name of the rising edge path or falling edge path will be executed. The statename and path label can be any name defined by the user. The / denotes the falling edge path. The maximum number of statename are 256 and the maximum number of different pathname are 128. Example: INPUT STATES ; Run: ; input states declaration TR1 P12Start TR2 /P13Stop TR3 P14Go/P15Pause
where Run denotes the input statename and P12Start, /P13Stop, P14Go and /P15Pause are all pathnames. When a rising edge signal triggers the TR1, then the path of P12Start will be executed. And if a falling edge signal triggers the TR1, then the signal is ignored, etc.
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Output states declaration Syntax: OUTPUT STATES ; statename: OUTn .... OutputMode ....
The possible output mode are listed and described on the following table. The maximum number of output state are 256. Output Mode X H L P+ PSP+ SPExample: OUTPUT STATES ; SirenOn: OUT1 P+ ; output states declaration OUT2 L Description Set OUTn to input mode with pull-high resistor Set the output pins to logic high Set the output pins to logic low Send a (+) pulse train to output pins Send a (-) pulse train to output pins Send a plus single pulse to output pins Send a minus single pulse to output pins
where SirenOn denotes the output statename. Executing SirenOn in the path command will send a positive pulse train to PB0 and send a logic low to PB1. Path command definition Syntax: PATHS pathname: path command .... The pathname is defined according to the users desire. The elements of the path command are listed and described on the following table. Each path equation consists of many path commands and each command is separated by one or more space. In order to increase the program readability if the path commands exceed the screen display you can break the path command to the next line and put the symbol & in front of the new line.
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Path_Command Input statename Output statename Pathname VAR=pathname VAR Volume_1=n Volume_2=n Samplerate_1=n Samplerate_2=n Delay(n) TRn?H:pathname TRn?L:pathname Flashrate=n FlashrateT=n FlashrateV=n END Mi=PB STOP1 STOP2 Mi=data Mi=Mj Mi(bn)=1 or 0 Mi=Mj+data Mi=Mi+Mj Mi=Mj.AND.data Mi=Mj.OR.data Mi=Mj.XOR.data Mi?data:pathname Mi?Mj:pathname Mi(bn)?1:pathname Mi(bn)?0:pathname To active input state To active output state To execute the specified path Define the variable path To execute the variable path Define the volume 1 value (n=0~15) Define the volume 2 value (n=0~15) Define the sampling rate 1 value Define the sampling rate 2 value To delay n (min=0.1s) (n=0.1~65), fOSC=4MHz If TRn is logic High, then the pathname is executed. If TRn is logic Low, then the pathname is executed. Set the output pulse rate to n pulses per second, where n can be assigned as 1, 2, 3, ..., 12 Set the output pulse rate after the melody tempo, n=1, 2, 3, ..., 12 Set the output pulse rate after the volume, n=1, 2, ..., 12 Enter power down mode Read Port B to Mi Stop the sound of channel 1 playback Stop the sound of channel 2 playback Set the contents of Mi to be data Set the contents Mi to be Mj Set bit bn to be 1 or 0, bn=0~7 Add immediate data with Mj to Mi Add Mi with Mj to Mi And immediate data with Mj to Mi, data=0~255 OR immediate data with Mj to Mi, data=0~255 XOR immediate data with Mj to Mi, data=0~255 If Mi=data then pathname is executed If Mi=Mj then pathname is executed. If the bit bn of Mi is 1 then the pathname is executed. If the bit bn of Mi is 0 then the pathname is executed. Description
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Path_Command Mi:[Path1, Path2, Path3, .... Pathn] Random(Mi) Timert: timer_path TimerON TimerOFF n*soundfile, n*#N or #N [n*soundfile] or [repeat *soundfile] Wait Description Path1 is executed when Mi=1; Path2 is executed when Mi=2; .... Pathn is executed when Mi=n Get a random code and put it to Mi Initial the timer. If time out then timer_path is executed, t=0.1~65 sec. Start the timer counter Stop timer counter Play the soundfile n times #N is the Nth soundfile which is defined in the audio file declaration part. The starting number is 0 Play the soundfile n times or repeatedly via channel 2 and simultaneously execute the next path command. Stop executing the next path command until the channel 2 soundfile is terminated.
Note: The n of TRn ranges from 1 to 32 Volume_1=15 is equal to Volume=15 Samplerate_1=4000 is equal to Samplerate=4000, 4000 means that the sampling rate is 4kHz. The Mi, Mj are working registers (i, j=0, 1, 2, ..., 10), the M0~M4 are dedicated for users, the others are shared with VAR and Timer command. Register M0~M4 M5, M6 M7~M10 Example: EASY 4 INPUT STATES ; start: PATHS POWERON: start END where POWERON is a reserved pathname and provides the initial setting. When the power is turned on, a falling edge trigger in TR1 is accepted and others are all ignored. TR1 /P1 TR2 X TR3 X TR4 X Command 3/4 VAR Timer Normal register If the VAR instruction is used, the M5, M6 will be invalid. If the Timer instruction are used, the M7~M10 will be invalid. Comment
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Application 1 3/4 One shot, nonretriggerable EASY 4 voice.wav/pcm8 INPUT STATES ; state1: busy: PATHS POWERON: path1:
TR1 AUD
;#0 sound file declaration TR1 /path1 X TR2 X X TR3 X X TR4 X X
state1 busy
END 1*voice state1 END
Application 2 3/4 One shot, retriggerable by itself EASY 4 voice.wav/pcm8 INPUT STATES ; state1: PATHS POWERON: path1:
TR1 AUD
;#0 sound file declaration TR1 /path1 TR2 X TR3 X TR4 X
state1 1*voice
END END
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Application 3 3/4 One shot, retriggerable by the other pin only EASY 4 voice1.wav/pcm8 voice2.wav/pcm8 voice3.wav/pcm8 voice4.wav/pcm8 INPUT STATES ; state0: state1: state2: state3: state4: PATHS POWERON: path1: path2: path3: path4:
TR1
;#0 sound file declaration ;#1 ;#2 ;#3 TR1 /path1 X /path1 /path1 /path1 TR2 /path2 /path2 X /path2 /path2 TR3 /path3 /path3 /path3 X /path3 TR4 /path4 /path4 /path4 /path4 X
state0 state1 state2 state3 state4
END #0 #1 #2 #3 state0 state0 state0 state0 END END END END
TR2~TR4
AUD #0 #0 # (1 ~ 3 )
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Application 4 3/4 Level hold, retriggerable by the other pin only EASY 4 voice1.wav/pcm8 voice2.wav/pcm8 voice3.wav/pcm8 voice4.wav/pcm8 INPUT STATES ; state0: state1: state2: state3: state4: PATHS POWERON: path1: path2: path3: path4: path11:
TR1
;#0 sound file declaration ;#1 ;#2 ;#3 TR1 /path1 path11 /path1 /path1 /path1 TR2 /path2 /path2 path11 /path2 /path2 TR3 /path3 /path3 /path3 path11 /path3 TR4 /path4 /path4 /path4 /path4 path11
state0 state1 state2 state3 state4 state0
END #0 #1 #2 #3 END path1 path2 path3 path4
TR2~TR4
AUD #0 #0 #0 # (1 ~ 3 )
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Application 5 3/4 LED output, direct mode EASY 4 voice1 .wav/pcm8 ;#0 sound file declaration INPUT STATES ; state0: ;OUT alarm: standby: turnoff: PATHS POWERON: path1: state0 alarm flashrate=6Hz #0 standby END delay(2) turnoff END TR1 /path1 1 P+ L X TR2 X 2 L H X TR3 X TR4 X
OUTPUT STATES
Application 6 3/4 LED output matrix mode EASY 4 INPUT STATES ; state0: OUTPUT STATES ; LED1: LED2: LED3: LED4: LED5: LED6: LED7: LED8: LED9: LED10: LED11: LED12: turnoff: OUT1 OUT2 OUT3 OUT4 P+ L L P+ L L P+ L L P+ L L X L P+ L L P+ L L P+ L L P+ L X L L P+ L L P+ L L P+ L L P+ X L L L H H H H H H H H H X OUT5 H H H L L L H H H H H H X OUT6 H H H H H H L L L H H H X OUT7 H H H H H H H H H L L L X TR1 /path0
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PATHS POWERON: path0: P1: P2: P3: P4: P5: P6: P7: P8: P9: P10: P11: P12: state0 M0=0 M0=M0+1 & M0:[P1,P2,P3,P4,P5,P6,P7,P8,P9,P10,P11,P12] LED1 LED2 LED3 LED4 LED5 LED6 LED7 LED8 LED9 LED10 LED11 M0=0 delay(2) delay(2) delay(2) delay(2) delay(2) delay(2) delay(2) delay(2) delay(2) delay(2) delay(2) LED12 turnoff turnoff turnoff turnoff turnoff turnoff turnoff turnoff turnoff turnoff turnoff delay(2) END END END END END END END END END END END turnoff END flashrate=3Hz END
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Application 7 3/4 Police car This is a full program application example to demonstrate how Easy Format handles a complicated design requirement. All the work is to be done on a single page.
START
ACCEL
S IR E N
BRAKE
L1
L2
There are four input trigger buttons and two output pins to drive two LEDs.
* BUTTON #1: Turn ON (START) or OFF the engine. * BUTTON #2: Gas pedal to give ACCELERATION sound from idle and then keep on at a steady
running sound.
* BUTTON #3: SIREN sound On/Off: toggle ON and toggle Off. * BUTTON #4: BRAKE, triggers deceleration sound and then brings the car to idle. * LEDs OUTPUTs: Blinks in opposite phase when the Siren sound is on. That is when one light is on,
the other light is off in an alternating pattern. period if no more trigger signal is received.
* TIME OUT REQUIREMENTS: every sound needs to be automatically shut down after a specified
Easy FormatTM application example: Police Car flow chart
ID L E
P12START
P23ACCEL P21START P13ACCEL
P32BRAKE
P 2 5 S IR E N O N
P 5 3 S IR E N O N RUN P 5 3 S IR E N O F F S IR E N + R U N
STOP
P 1 4 S IR E N O N P 4 1 S IR E N O F F S IR E N
P54BRAKE P45ACCEL
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EASY 4 ********************************************************************** ;* voice file define ********************************************************************** StartSnd.wav/ad4 IdleSnd.wav/ad4 AccelSnd.wav/ad4 RunSnd.wav/ad4 DecelSnd.wav/ad4 SirenSnd.wav/ad4 SiRunSnd.wav/ad4 ********************************************************************* ;* I/O States ********************************************************************* INPUT STATES ; ; StopCar: Idle: Run: Siren SirenRun OUTPUT STATES ; SirenOn: SirenOff: ;* Paths ********************************************************************* Paths POWERON: P12Start: P21Start: P13Accel: StopCar Idle StopCar Run SirenOff END 1*AccelSnd 20*RunSnd FLASHRATE=6Hz END 1*StartSnd 10*IdleSnd 2*IdleSnd PowerDown OUT1 P+ H OUT2 PH TR1 Start TR2 Accel TR3 Siren /P14SirenOn /P25SirenOn /P35SirenOn /P41SirenOff /P53SirenOff TR4 Brake X X /P32Brake X /P54Brake
/P12Start /P13Accel /P21Start /P23Accel X X X X /P45Accel X
*********************************************************************
& PowerDown
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P14SirenOn: P41SirenOff: P23Accel: P32Brake: P25SirenOn: P35SirenOn: P53SirenOff: P45Accel: P54Brake: PowerDown: Siren StopCar Run Idle SirenOn SirenOff 1*AccelSnd 1*DecelSnd SirenOn Run 10*SirenSnd END 20*RunSnd 10*idleSnd SirenOn PowerDown PowerDown 10*SiRunSnd PowerDown PowerDown PowerDown
1*AccelSnd SirenRun SirenOff
SirenRun
10*SiRunSond
20*RunSnd SirenOn End
PowerDown 10*SirenSnd
P25SirenOn 1*DecelSnd & PowerDown SirenOff StopCar Siren
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Holtek Semiconductor Inc. (Headquarters) No.3 Creation Rd. II, Science-based Industrial Park, Hsinchu, Taiwan, R.O.C. Tel: 886-3-563-1999 Fax: 886-3-563-1189 Holtek Semiconductor Inc. (Taipei Office) 5F, No.576, Sec.7 Chung Hsiao E. Rd., Taipei, Taiwan, R.O.C. Tel: 886-2-2782-9635 Fax: 886-2-2782-9636 Fax: 886-2-2782-7128 (International sales hotline) Holtek Semiconductor (Hong Kong) Ltd. RM.711, Tower 2, Cheung Sha Wan Plaza, 833 Cheung Sha Wan Rd., Kowloon, Hong Kong Tel: 852-2-745-8288 Fax: 852-2-742-8657 Copyright a 2000 by HOLTEK SEMICONDUCTOR INC. The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw.
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